Webinar: Transform Your PCIe Design Strategies from Classic to Smart Design Workflow by Horizon House Publications

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Transform Your PCIe Design Strategies from Classic to Smart Design Workflow

About

PCIe 6 is the latest and fastest standard for high-performance data transfer, offering up to 64 GT/s and PAM 4 signaling. However, designing PCIe 6 devices is not trivial. It requires a comprehensive and efficient workflow that can handle the new technology's complexity and challenges, such as tighter design margins, higher power consumption, stricter compliance requirements, and the complexity of AMI model generation. This webinar will comprehensively explore the newer, smarter, modern PCIe workflow and showcase innovative solutions that simplify and accelerate your PCIe design compliance. You will learn:

Strategies to overcome design challenges and optimize workflow efficiency.

Techniques to generate precise AMI models and ensure design specification compliance.

Insights to achieve effective retimer implementation and explore test case scenarios.

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Presenter

Saish Sawant

Application Development Scientist, Keysight Technologies

Saish Sawant is an Application Development Scientist with Keysight Technologies – Keysight EDA business group. He graduated from University of Colorado – Boulder with a focus on RF/Microwave and Signal Integrity. Prior to graduate school, he worked for Society for Applied Microwave Electronics Engineering and Research (SAMEER), a Government of India R&D institute in Mumbai, India as Research Scientist developing RF frontend sub-systems.

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